editorconfig: add setting to trim trailing whitespace

and clean up all outstanding issues

Skip 'test cases/common/141 special characters/meson.build' since it
intentionally uses trailing newlines.

2 files changed, 7 insertions, 8 deletions

diff --git a/test cases/fpga/1 simple/meson.build b/test cases/fpga/1 simple/meson.build
index eff8088ba..f1ab690fd 100644
--- a/test cases/fpga/1 simple/meson.build
+++ b/test cases/fpga/1 simple/meson.build
@@ -6,4 +6,3 @@ is.project('spin',
   'spin.v',
   constraint_file : 'spin.pcf',
 )
-
diff --git a/test cases/fpga/1 simple/spin.v b/test cases/fpga/1 simple/spin.v
index edc40c426..2143d301e 100644
--- a/test cases/fpga/1 simple/spin.v
+++ b/test cases/fpga/1 simple/spin.v
@@ -1,29 +1,29 @@
 
 module top(input clk, output LED1, output LED2, output LED3, output LED4, output LED5);
-   
+
    reg ready = 0;
    reg [23:0] divider;
    reg [3:0] spin;
-   
+
    always @(posedge clk) begin
-      if (ready) 
+      if (ready)
         begin
-           if (divider == 6000000) 
+           if (divider == 6000000)
              begin
                 divider <= 0;
                 spin <= {spin[2], spin[3], spin[0], spin[1]};
              end
-           else 
+           else
              divider <= divider + 1;
         end
-      else 
+      else
         begin
            ready <= 1;
            spin <= 4'b1010;
            divider <= 0;
         end
    end
-   
+
    assign LED1 = spin[0];
    assign LED2 = spin[1];
    assign LED3 = spin[2];